Hi,

 

I'm in need of help with the I2S "drivers" for Arch Linux ARM and the A20 processor.

 

I need to create a 4-wire I2S output.

 

1. BCLK

2. LRCLK

3. DATA

4. MCLK = 256xfs

 

I can't seem to work out how to make #4, a Master Clock fixed at 256 * Fs.

 

I've been using this code as a starting point:

https://github.com/dan-and/linux-sunxi/tree/dan-3.4.current/sound/soc/sunxi/i2s

 

and I am not a Kernel developer. At all.

 

Thanks.

I never try this myself but according to user feedback I2S is working well on Cubietruck and Banana PRO with the kernel source you are pointing to. I think the problem is if it is wired to the connector and of course if your device settings are correct. On which board you are trying to do that?

 

On Cubietruck should work out of the box, on Banana PRO you might need to adjust FEX settings (script.bin with decompile, edit, compile back).

[i2s_para]
i2s_used = 1
i2s_channel = 2
i2s_mclk = port:PB05<2><1><default><default>
i2s_bclk = port:PB06<2><1><default><default>
i2s_lrclk = port:PB07<2><1><default><default>
i2s_dout0 = port:PB08<2><1><default><default>
i2s_dout1 =
i2s_dout2 =
i2s_dout3 =
i2s_din = port:PB12<2><1><default><default>

More info:

http://www.cubieforums.com/index.php/topic,1081.0.html

Edited July 23, 201511 yr by Igor
more info

Thanks for the reply!

 

I'm on the ITEAD Core EVO, similar to the Cubietruck.

 

My FEX looks like yours.

 

When I play a file (96kHz / 24bit) I get a Kernel log entry:

[   79.060885] [iIS-0] get_clock_divder_master: rate=(96000), mclk_div=(1), mpll=(0), bclk_div=(4), mult_fs=(256)

 

I'm quite certain that I have everything connected properly, but still no luck.

 

When you mention Device Settings, is there something other than the FEX file? Is there a way to "Force" the 256?

 

Again, thanks. (NOTE: I'm willing to talk about consulting fees.)

If you can play less than 24 bit than it's fixable. There is a patch for 24bit playback which is not implemented yet.

Sure, we can start there @ 16bit.

 

I see: http://www.cubieforums.com/index.php/topic,1081.msg9283.html#msg9283

Looks like (doing the math) that the MCLK = 512? (22579200 / 44100) Can it be set to 256?

Without a scope, I'm not positive... but I think I only get a signal @ 44.1 & 48. Also, i do not think the signal is 256xfs, or I suspect this DAC would work.

Little further on is a solution worth to try:

http://www.cubieforums.com/index.php/topic,1081.msg23222.html#msg23222

 

If you have compile environment just merge and try or wait that I add this to the kernel pack.

Didn't work.

 

I still seem to have MCLK only on 44.1 & 48. And, it does not seem to be 256xfs.

I realized that I mixed up something here. This patch is only for SPDIF which is not what you need. Huh. I2S, Damn

The author of both implementations is nikkov@gmail.com ... try.