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Indeed, the configuration in the mvebu64.conf script is wrong.
The 2 CS 2 GB image is compiled with the same DDR topology parameter as the 2 CS 1 GB image (DDR_TOPOLOGY=2).
It appears that the configuration for the 2 CS 512 MB version is also wrong, as it points to the same topology file as the 1 CS version.
I guess this is not really a problem, because I'm not even sure that this variant actually exists.
So to answer my previous question:
What is used is only 512 MB from each chip.
If anyone needs it, here is the bootloader (U-Boot 2018.03-18.12) compiled with the correct topology (DDR_TOPOLOGY=7):
flash-image-ddr3-2g-2cs-1000_800.bin
Note that only changing the DDR_TOPOLOGY from 2 to 7 was not enough, because this configuration is also missing from the Marvell sources, even though that's the parameter used in the build examples.
The correct topology exists in the Armbian tree, but with the wrong name:
https://github.com/armbian/build/blob/master/packages/blobs/espressobin/DDR_TOPOLOGY_2-2g.txt
The A3700-utils-marvell/script/buildtim.sh script must also be adapted to accept a DDR_TOPOLOGY value higher than 6.