September 12Sep 12 Hi! I have T95MAX v.2 board with H616 and AXP313A. I cannot up Panfrost acceleration, i think it because no renderD128 node at /dev/dri. Kernel module panfrost is laoded. Also, i' ve seen this strings at dmesg [ 1.658450] PM: always-on PM domain PLL is not on [ 1.658480] sun50i-h6-prcm-ppu 7010250.power-controller: Failed to add PLL power domain: -22 [ 1.658494] sun50i-h6-prcm-ppu 7010250.power-controller: probe with driver sun50i-h6-prcm-ppu failed with error -22 root@transpeed-8k618-t:~# ls /dev/dri by-path card0 root@transpeed-8k618-t:~# lsmod | grep panfrost panfrost 90112 0 drm_shmem_helper 28672 1 panfrost gpu_sched 57344 1 panfrost Is this dmesg error correlated with panfrost disfunction? Any ideas about this?
September 15Sep 15 Yes, they're related — I'd treat the PPU probe failure as the direct reason you're not getting renderD128. On the H616 the Mali node in the device tree references a power domain provided by sun50i-h6-prcm-ppu. That driver registers three domains (PLL, ANA, GPU) out of two PRCM registers, and panfrost won't create its render node until the GPU domain exists and is powered. Your log shows the driver bailing out during probe, so the GPU domain never gets registered and panfrost keeps deferring forever. The -22 comes from the PLL entry: the driver marks it always-on, and the PM core refuses to register an always-on domain that reads as off at probe time — that's exactly what the "always-on PM domain PLL is not on" line means. The PLL gate is the active-low bit 2 in the PRCM VDD_SYS register, so you can check the real state with devmem 0x7010250 (bit 2 set = rail gated). Dev boards usually come up with that rail on because their bootloader enables it; plenty of TV boxes like the T95MAX leave it gated, which is why this mostly bites box owners. The clean workaround is to clear that bit before the kernel probes the PPU, e.g. from U-Boot: read the register with md.l, write it back with bit 2 cleared via mw.l. After that the driver should probe cleanly and panfrost should pick up the GPU domain and create the render node. Might also be worth reporting upstream that the driver hard-fails here instead of switching the always-on rail on itself — it would save every H616 box owner this detour.
October 1Oct 1 Author I tried to read VDD_SYS from uboot md.l 0x7010250 07010250: 00000000 00000000 00000000 00000000 ................ 07010260: 00000000 00000000 00000000 00000000 ................ 07010270: 33034413 00000000 00000000 00000000 .D.3............ 🤔 Seems like 0x7010250 set to 0 on start... Also, i tried to read devmem after boot root@transpeed-8k618-t:~/devmem2# ./a.out 0x7010250 /dev/mem opened. Memory mapped at address 0xffffb8b7e000. Value at address 0x7010250 (0xffffb8b7e250): 0x0
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