i have a OPi lite using the mainline 4.10.0 kernel, my armbianEnv.txt looks like:

verbosity=7
console=both
machid=1029
bootm_boot_mode=sec
rootdev=UUID=c6f6e80d-df93-4268-be53-0a9dac46bc96
rootfstype=ext4
overlays=sun8i-h3-i2c0 sun8i-h3-w1-gpio sun8i-h3-uart3 sun8i-h3-spi0-spidev
param_w1_pin=PC7
param_w1_pin_int_pullup=1
param_uart3_rtscts=0

 

im trying to disable the rts and cts pins for uart 3 because they end up messing with the green led

a section from dmesg:

[    3.656317] sun8i-h3-pinctrl 1c20800.pinctrl: pin PA15 already requested by 1c28c00.serial; cannot claim for leds
[    3.656324] sun8i-h3-pinctrl 1c20800.pinctrl: pin-15 (leds) status -22
[    3.656331] sun8i-h3-pinctrl 1c20800.pinctrl: could not request pin 15 (PA15) from group PA15  on device 1c20800.pinctrl
[    3.656336] leds-gpio leds: Error applying setting, reverse things back
[    3.656351] leds-gpio: probe of leds failed with error -22

 

if I manually use GPIO control I can turn on and off the green led (360) and red led (15) but I would like to not have the system try and use those pins for uart3 to begin with

I have found on this forum how to change the fex files for legacy kernels to put the uart in 2 wire mode (actually had a section to change the registered ttyS port)

but I haven't found how to do it for the mainline kernel, the last line in my armbianEnv.txt file is something I found at

https://docs.armbian.com/Hardware_Allwinner_overlays/

but it doesn't seem to do anything

You have an old enough image (4.10.0 or -rcX kernel, bootm_boot_mode and no overlay prefix in armbianEnv, etc.)

Please try a fresh nightly image and configure it according to the overlays documentation and SoC specific README referenced there.

ok, I have kernel 4.10.3 using todays fresh nightly kernel (apt-get update && apt-get upgrade on 4-4-2017). this fixed my issue with the uart.

the only problem i have now is with spi. i am loading the overlays but they are not listed in /dev and pinmux doesn't show it the pins being used for spi

Spoiler

cat /sys/kernel/debug/pinctrl/1c20800.pinctrl/pinmux-pins 
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (PA0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 1 (PA1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 2 (PA2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 3 (PA3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 4 (PA4): 1c28000.serial (GPIO UNCLAIMED) function uart0 group PA4
pin 5 (PA5): 1c28000.serial (GPIO UNCLAIMED) function uart0 group PA5
pin 6 (PA6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 7 (PA7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 8 (PA8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 9 (PA9): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 10 (PA10): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 11 (PA11): 1c2ac00.i2c (GPIO UNCLAIMED) function i2c0 group PA11
pin 12 (PA12): 1c2ac00.i2c (GPIO UNCLAIMED) function i2c0 group PA12
pin 13 (PA13): 1c28c00.serial (GPIO UNCLAIMED) function uart3 group PA13
pin 14 (PA14): 1c28c00.serial (GPIO UNCLAIMED) function uart3 group PA14
pin 15 (PA15): leds 1c20800.pinctrl:15 function gpio_out group PA15
pin 16 (PA16): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 17 (PA17): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 18 (PA18): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 19 (PA19): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 20 (PA20): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 21 (PA21): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 64 (PC0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 65 (PC1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 66 (PC2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 67 (PC3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 68 (PC4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 69 (PC5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 70 (PC6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 71 (PC7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 72 (PC8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 73 (PC9): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 74 (PC10): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 75 (PC11): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 76 (PC12): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 77 (PC13): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 78 (PC14): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 79 (PC15): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 80 (PC16): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 96 (PD0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 97 (PD1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 98 (PD2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 99 (PD3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 100 (PD4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 101 (PD5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 102 (PD6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 103 (PD7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 104 (PD8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 105 (PD9): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 106 (PD10): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 107 (PD11): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 108 (PD12): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 109 (PD13): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 110 (PD14): onewire@0 1c20800.pinctrl:110 function gpio_in group PD14
pin 111 (PD15): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 112 (PD16): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 113 (PD17): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 128 (PE0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 129 (PE1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 130 (PE2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 131 (PE3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 132 (PE4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 133 (PE5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 134 (PE6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 135 (PE7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 136 (PE8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 137 (PE9): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 138 (PE10): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 139 (PE11): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 140 (PE12): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 141 (PE13): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 142 (PE14): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 143 (PE15): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 160 (PF0): 1c0f000.mmc (GPIO UNCLAIMED) function mmc0 group PF0
pin 161 (PF1): 1c0f000.mmc (GPIO UNCLAIMED) function mmc0 group PF1
pin 162 (PF2): 1c0f000.mmc (GPIO UNCLAIMED) function mmc0 group PF2
pin 163 (PF3): 1c0f000.mmc (GPIO UNCLAIMED) function mmc0 group PF3
pin 164 (PF4): 1c0f000.mmc (GPIO UNCLAIMED) function mmc0 group PF4
pin 165 (PF5): 1c0f000.mmc (GPIO UNCLAIMED) function mmc0 group PF5
pin 166 (PF6): 1c0f000.mmc 1c20800.pinctrl:166 function gpio_in group PF6
pin 192 (PG0): 1c10000.mmc (GPIO UNCLAIMED) function mmc1 group PG0
pin 193 (PG1): 1c10000.mmc (GPIO UNCLAIMED) function mmc1 group PG1
pin 194 (PG2): 1c10000.mmc (GPIO UNCLAIMED) function mmc1 group PG2
pin 195 (PG3): 1c10000.mmc (GPIO UNCLAIMED) function mmc1 group PG3
pin 196 (PG4): 1c10000.mmc (GPIO UNCLAIMED) function mmc1 group PG4
pin 197 (PG5): 1c10000.mmc (GPIO UNCLAIMED) function mmc1 group PG5
pin 198 (PG6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 199 (PG7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 200 (PG8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 201 (PG9): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 202 (PG10): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 203 (PG11): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 204 (PG12): 1c19400.phy 1c20800.pinctrl:204 function gpio_in group PG12
pin 205 (PG13): (MUX UNCLAIMED) (GPIO UNCLAIMED)

 

 

 

my /boot/armbianEnv.txt  is

cat /boot/armbianEnv.txt 
verbosity=7
console=both
machid=1029
bootm_boot_mode=sec
rootdev=UUID=c6f6e80d-df93-4268-be53-0a9dac46bc96
rootfstype=ext4
overlays=sun8i-h3-cir sun8i-h3-i2c0 sun8i-h3-spi-add-c1 sun8i-h3-spi-spidev sun8i-h3-uart3 sun8i-h3-w1-gpio
param_spidev_spi_bus=0
param_spidev_spi_cs=1
param_w1_pin=PC7
param_w1_pin_int_pullup=1

 

Edited April 5, 20179 yr by Igor
moved under spoiler

I specifically said fresh nightly image because u-boot script and armbianEnv.txt need updates too. And looking at PD14 claimed by 1-wire overlays fixup script most likely is not running - this would also explain missing SPIdev device (even though you have a typo in overlay name - it should be "spi-add-cs1").

Please install a new image, add overlays (you won't need "sun8i-h3-" prefix) and report then.

 

Or update the boot script and armbianEnv.txt:

For the boot script - download this to /boot/boot.cmd and recompile it to /boot/boot.scr

 

For the armbianEnv.txt - add

overlay_prefix=sun8i-h3

and remove "sun8i-h3-" prefixes from names in "overlays=" line

thank you very much. this did the trick. i tested uart2 and it works fine, i2cdetect -y 0 works and i can scope signals on the i2c lines,

i can scope the pin i assigned for 1 wire making what i assume are polling pulses. spi works now, i tested spi 0 with a loopback test and it works fine

 

i of course only have spi0.1 exposed in /dev . I saw the other thread around here where it was said that when you enable cs1 it disable cs0.

i don't understand why you would want this behavior, the only reason you would want to enable cs1 is to have 2 spi chips attached to the board.

i guess maybe there are some hat boards that use cs1 instead of cs0 and this is done to make those work?

 

also the I2S1 pins pull high even though i do not have I2C1 enabled. i don't know if this is normal behavior or if this is because I2C0 is enabled

5 hours ago, benjamin545 said:

I saw the other thread around here where it was said that when you enable cs1 it disable cs0.

Not exactly. I said that provided overlays can activate only one device of the same type.

 

5 hours ago, benjamin545 said:

i don't understand why you would want this behavior, the only reason you would want to enable cs1 is to have 2 spi chips attached to the board.

 

You can still use a custom overlay to add 2 SPIdev devices. Or you can activate different device types (i.e. a display and a touch screen, or a CAN adapter and a SPI NOR flash), one on CS0 and the other obe one on CS1.