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Jacob George

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Everything posted by Jacob George

  1. @robertoj I thought that is what github provides, a complete track record of commits, pushes and changes? It's all there, I also have had contributor's. It's being sanity checked. The Orange Pi 4 Pro is nearly identical to Radxa Cubie A7A, I will be making a branch for the A7A shortly.
  2. @eselarm holy smokes I didn't even catch it, thanks! Opus 5 Reply: " Definitive — the reviewer is right, and it's a real bug rather than a typo. MIDR straight off the silicon: cpu0-cpu5 part=0xd05 Cortex-A55 max 1794 MHz cpu6-cpu7 part=0xd0b Cortex-A76 max 2002 MHz 2× Cortex-A76 + 6× Cortex-A55. Our README says it correctly in one place (line 352) and incorrectly in another (line 120), and — worse — SunxiSmbiosDxe reports 4x A76 + 4x A55 in the SMBIOS Type 4 table, so every OS that boots this firmware is being told the wrong CPU topology. That's not a doc nit; it's wrong data on the wire. Let me see the surrounding context before fixing."
  3. The Allwinner A733 EDK2 Port has hit a major milestone. NVME link is up and running.
  4. @humanus I am back in the lab and near completion of the EDK2 port. @edk2-a733 A Gift: I have found some useful documentation that could help everyone in this thread. A733_Datasheet_V0.92.pdf [3.7MB] A733_User Manual_V0.92.pdf [73MB]
  5. @alexc Had to take a couple days break while we wait for a ordered Oscilloscope and CH341 to arrive. Current focus is SPI-NOR which is the most dangerous part of this EDK2 port due to the vendor of the board not releasing it to the public. That doesn't stop us tinkerers from from physically pulling it from the on-board SPI-NOR, so holding back such a valuable piece of the puzzle serves what purpose? They released it for the Rockchip SoC so who knows. After the SPI-NOR is conquered I hope to get some runtime pixels on the screen. I say around that time the EDK2 will be more of a usable boot loader to start on the alpha release (compiled public release). Right now I can boot to a generic Ubuntu 26.04 with working ssh and uart so things are looking good. Working with Opus 4.8 has been surprisingly very productive. These models have got so much better, I find myself getting more sleep by using Openclaw HEARTBEAT.md to nudge Opus 4.8 every 30 minutes to autonomously work on the port in my absence My good guy has a full report of his work done and ready to review by lunchtime
  6. Hello, I am new to the conversation but I would like to add something I am working on. I am almost done the EDK2 port to A733, see: https://github.com/vehoelite/edk2-a733 I am actively getting further everyday. I have let A.I. take full credit (seems to make Opus 4.8 work better) but regardless I suspect the port to be finished within a week or up to a month if I hit a snag.

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