OKAY SO I SPEND 5 HOURS FIGURING IT OUT AND I (oh i should cald down) figured out that issue was in images. none of images that were listed on page for orange pi 4 lts did not work. the second i inserted sd cart with official OS from orange pi it booted.
btw there is log when any armbian image is used:
In
channel 0
CS = 0
MR0=0x18
MR4=0x2
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x18
MR4=0x3
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
change freq to 416MHz 0,1
Channel 0: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
Channel 1: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
256B stride
channel 0
CS = 0
MR0=0x18
MR4=0x83
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x18
MR4=0x3
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
channel 0, cs 0, advanced training done
channel 1, cs 0, advanced training done
change freq to 856MHz 1,0
ch 0 ddrconfig = 0x101, ddrsize = 0x40
ch 1 ddrconfig = 0x101, ddrsize = 0x40
pmugrf_os_reg[2] = 0x32C1F2C1, stride = 0xD
ddr_set_rate to 328MHZ
ddr_set_rate to 666MHZ
ddr_set_rate to 416MHZ, ctl_index 0
ddr_set_rate to 856MHZ, ctl_index 1
support 416 856 328 666 MHz, current 856MHz
OUT
Boot1 Release Time: May 29 2020 17:36:36, version: 1.26
CPUId = 0x0
ChipType = 0x10, 353
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=14910MB
FwPartOffset=2000 , 100000
mmc0:cmd5,20
SdmmcInit=0 0
BootCapSize=0
UserCapSize=30436MB
FwPartOffset=2000 , 0
StorageInit ok = 251529
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
atags_set_bootdev: ret:(0)
GPT 0x3335db8 signature is wrong
recovery gpt...
GPT 0x3335db8 signature is wrong
recovery gpt fail!
Trust Addr:0x4000, 0x0
Trust Addr:0x4400, 0x0
Trust Addr:0x4800, 0x0
Trust Addr:0x4c00, 0x0
Trust Addr:0x5000, 0x0
Trust Addr:0x5400, 0x0
Trust Addr:0x5800, 0x0
Trust Addr:0x5c00, 0x0
Addr:0x4000 No find trust.img!
LoadTrustBL error:-3
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
atags_set_bootdev: ret:(0)
GPT part: 0, name: security, start:0x2000, size:0x2000
GPT part: 1, name: uboot, start:0x4000, size:0x2000
GPT part: 2, name: trust, start:0x6000, size:0x2000
GPT part: 3, name: misc, start:0x8000, size:0x2000
GPT part: 4, name: dtbo, start:0xa000, size:0x2000
GPT part: 5, name: vbmeta, start:0xc000, size:0x800
GPT part: 6, name: boot, start:0xc800, size:0x14000
GPT part: 7, name: recovery, start:0x20800, size:0x36000
GPT part: 8, name: backup, start:0x56800, size:0xba000
GPT part: 9, name: cache, start:0x110800, size:0xc0000
GPT part: 10, name: metadata, start:0x1d0800, size:0x8000
GPT part: 11, name: baseparameter, start:0x1d8800, size:0x800
GPT part: 12, name: super, start:0x1d9000, size:0x614000
GPT part: 13, name: userdata, start:0x7ed000, size:0x1531fdf
find part:uboot OK. first_lba:0x4000.
find part:trust OK. first_lba:0x6000.
Trust Addr:0x6000, 0x58334c42
No find bl30.bin
Load uboot, ReadLba = 4000
Load OK, addr=0x200000, size=0x10aad0
RunBL31 0x40000 @ 315316 us
NOTICE: BL31: v1.3(release):845ee93
NOTICE: BL31: Built : 15:51:11, Jul 22 2020
NOTICE: BL31: Rockchip release version: v1.1
INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO: Using opteed sec cpu_context!
INFO: boot cpu mask: 0
INFO: plat_rockchip_pmu_init(1196): pd status 3e
INFO: BL31: Initializing runtime services
INFO: BL31: Initializing BL32
INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-278-gef70f120a #zhangzj #9 Fri Sep 17 09:39:24 UTC 2021 aarch64)
INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9
U-Boot 2017.09 #orangepi (Sep 14 2022 - 19:19:13 +0800)
Model: Rockchip RK3399 Evaluation Board
PreSerial: 2, raw, 0xff1a0000
DRAM: 3.8 GiB
Sysmem: init
Relocation Offset: f5a70000
Relocation fdt: f3c642c0 - f3c66cdb
CR: M/C/I
Using default environment
DM: v1
dwmmc@fe320000: 1, sdhci@fe330000: 0
Bootdev(atags): mmc 0
MMC0: HS400, 150Mhz
PartType: EFI
boot mode: None
Android 12.0, Build 2022.6, v2
Found DTB in boot part
DTB: rk-kernel.dtb
HASH(c): OK
ANDROID: fdt overlay OK
I2c0 speed: 400000Hz
PMIC: RK808
vdd_center 900000 uV
vdd_cpu_l 900000 uV
vdd_log 1100000 uV
warning: bad baseparameter
Model: OrangePi 4 LTS
Rockchip UBOOT DRM driver version: v1.0.1
I2c7 speed: 100000Hz
Monitor has basic audio support
hdmi info isn't saved in main block
mode:1920x1080
hdmi@ff940000: detailed mode cloc 148500 kHz, flags[5]
H: 1920 2008 2052 2200
V: 1080 1084 1089 1125
bus_format: 2025
CEA mode used vic=16
final pixclk = 148500000 tmdsclk = 148500000
xfer: num: 2, addr: 0x54
xfer: num: 1, addr: 0x54
[dw_hdmi_i2c_write] write offset 21 success
PHY powered down in 0 iterations
xfer: num: 2, addr: 0x54
xfer: num: 1, addr: 0x54
[dw_hdmi_i2c_write] write offset 21 success
PHY PLL locked 1 iterations
PHY powered down in 0 iterations
xfer: num: 2, addr: 0x54
xfer: num: 1, addr: 0x54
[dw_hdmi_i2c_write] write offset 21 success
PHY PLL locked 1 iterations
sink has audio support
hdmi_set_clk_regenerator: fs=48000Hz ftdms=148.500MHz N=6144 cts=148500
CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
CLK: (uboot. armb: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
aplll 816000 KHz
apllb 816000 KHz
dpll 856000 KHz
cpll 24000 KHz
gpll 800000 KHz
npll 600000 KHz
vpll 148000 KHz
aclk_perihp 133333 KHz
hclk_perihp 66666 KHz
pclk_perihp 33333 KHz
aclk_perilp0 266666 KHz
hclk_perilp0 88888 KHz
pclk_perilp0 44444 KHz
hclk_perilp1 100000 KHz
pclk_perilp1 50000 KHz
Net: eth0: ethernet@fe300000
Hit key to stop autoboot('CTRL+C'): 0
ANDROID: reboot reason: "(none)"
optee api revision: 2.0
TEEC: Reset area[0] info...
TEEC: Reset area[1] info...
Vboot=0, AVB images, AVB verify
read_is_device_unlocked() ops returned that device is UNLOCKED
avb_slot_verify.c:762: ERROR: vbmeta: Error verifying vbmeta image: OK_NOT_SIGNED
get image from preloaded partition...
Could not find "system" partition
Booting IMAGE kernel at 0x00280000 with fdt at 0x08300000...
Fdt Ramdisk skip relocation
## Booting Android Image at 0x0027f800 ...
Kernel: 0x00280000 - 0x01e5d010 (28533 KiB)
ramdisk: 0x0a200000 - 0x0a34d708 (1334 KiB)
## Flattened Device Tree blob at 0x08300000
Booting using the fdt blob at 0x08300000
XIP Kernel Image from 0x00280000 to 0x00280000 ... OK
kernel loaded at 0x00280000, end = 0x01e5d010
'reserved-memory' ramoops@110000: addr=110000 size=f0000
Using Device Tree in place at 0000000008300000, end 000000000831d220
failed to reserve drm-cubic-lut memory
Adding bank: 0x00200000 - 0x08400000 (size: 0x08200000)
Adding bank: 0x0a200000 - 0xf8000000 (size: 0xede00000)
Total: 840.79 ms
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 4.19.232 (orangepi@ubuntu) (Android (7284624, based on r416183b) clang version 12.0.5 (https://android.googlesource.com/toolchain/llvm-project c935d99d7cf2016289302412d708641d52d2f7ee), LLD 12.0.5 (/buildbot/src/android/llvm-toolchain/out/llvm-project/lld c935d99d7cf2016289302412d708641d52d2f7ee)) #14 SMP PREEMPT Thu Sep 1 11:19:51 CST 2022
[ 0.000000] Machine model: OrangePi 4 LTS
[ 0.000000] earlycon: uart8250 at MMIO32 0x00000000ff1a0000 (options '')
[ 0.000000] bootconsole [uart8250] enabled
console:/ $ INF USER-TA:read_data_from_uboot_ta:661: (read_data_from_uboot_ta) filename(security_partition) !
ERR [0x1] TEE-CORE:ree_fs_open:1492: tee file not exists
ERR USER-TA:read_data_from_uboot_ta:689: TEE_InvokeTACommand returned 0xffff0000
INF USER-TA:TA_OpenSessionEntryPoint:341: Hello Rockchip Keymaster! rpmb :1
INF USER-TA:read_data_from_uboot_ta:661: (read_data_from_uboot_ta) filename(security_partition) !
ERR [0x0] TEE-CORE:ree_fs_open:1492: tee file not exists
ERR USER-TA:read_data_from_uboot_ta:689: TEE_InvokeTACommand returned 0xffff0000
INF USER-TA:TA_OpenSessionEntryPoint:341: Hello Rockchip Keymaster! rpmb :1
INF USER-TA:TA_InvokeCommandEntryPoint:2132: -------1111-----TA_InvokeCommandEntryPoint------105
INF USER-TA:TA_OpenSessionEntryPoint:96: Hello Rockchip Weaver! rpmb :1
INF USER-TA:TA_OpenSessionEntryPoint:114: Hello Rockchip gatekeeper! rpmb :1
and this is how it looks when official image is used:
In
channel 0
CS = 0
MR0=0x18
MR4=0x3
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x18
MR4=0x3
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
change freq to 416MHz 0,1
Channel 0: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
Channel 1: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB
256B stride
channel 0
CS = 0
MR0=0x18
MR4=0x3
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x18
MR4=0x3
MR5=0x1
MR8=0x10
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
channel 0, cs 0, advanced training done
channel 1, cs 0, advanced training done
change freq to 856MHz 1,0
ch 0 ddrconfig = 0x101, ddrsize = 0x40
ch 1 ddrconfig = 0x101, ddrsize = 0x40
pmugrf_os_reg[2] = 0x32C1F2C1, stride = 0xD
ddr_set_rate to 328MHZ
ddr_set_rate to 666MHZ
ddr_set_rate to 416MHZ, ctl_index 0
ddr_set_rate to 856MHZ, ctl_index 1
support 416 856 328 666 MHz, current 856MHz
OUT
Boot1 Release Time: May 29 2020 17:36:36, version: 1.26
CPUId = 0x0
ChipType = 0x10, 352
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=14910MB
FwPartOffset=2000 , 100000
mmc0:cmd5,20
SdmmcInit=0 0
BootCapSize=0
UserCapSize=14928MB
FwPartOffset=2000 , 0
StorageInit ok = 108458
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
atags_set_bootdev: ret:(0)
GPT 0x3335db8 signature is wrong
recovery gpt...
GPT part: 0, name: EFI System Partition, start:0x28, size:0x64000
GPT part: 1, name: , start:0x64800, size:0x1cc3000
recovery gpt success!
no find partition:uboot.
Trust Addr:0x4000, 0x58334c42
No find bl30.bin
No find bl32.bin
Load uboot, ReadLba = 2000
Load OK, addr=0x200000, size=0xb5130
RunBL31 0x40000 @ 288354 us
NOTICE: BL31: v1.3(debug):42583b6
NOTICE: BL31: Built : 07:55:13, Oct 15 2019
NOTICE: BL31: Rockchip release version: v1.1
INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO: Using opteed sec cpu_context!
INFO: boot cpu mask: 0
INFO: plat_rockchip_pmu_init(1190): pd status 3e
INFO: BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR: Error initializing runtime service opteed_fast
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x200000
INFO: SPSR = 0x3c9
U-Boot 2020.10-orangepi (Aug 01 2022 - 13:34:32 +0800)
Model: OrangePi 4 AI board
DRAM: 3.9 GiB
PMIC: RK808
MMC: mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Model: OrangePi 4 AI board
Net: eth0: ethernet@fe300000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot/boot.scr
3341 bytes read in 9 ms (362.3 KiB/s)
## Executing script at 00500000
Boot script loaded from mmc 1
159 bytes read in 7 ms (21.5 KiB/s)
21540756 bytes read in 1823 ms (11.3 MiB/s)
10807969 bytes read in 920 ms (11.2 MiB/s)
102595 bytes read in 22 ms (4.4 MiB/s)
2698 bytes read in 16 ms (164.1 KiB/s)
Applying kernel provided DT fixup script (rockchip-fixup.scr)
## Executing script at 09000000
Uncompressing Kernel Image
Moving Image from 0x2080000 to 0x2200000, end=40e0000
## Loading init Ramdisk from Legacy Image at 06000000 ...
Image Name: uInitrd
Image Type: AArch64 Linux RAMDisk Image (gzip compressed)
Data Size: 21540692 Bytes = 20.5 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 01f00000
Booting using the fdt blob at 0x1f00000
Loading Ramdisk to f4a99000, end f5f23f54 ... OK
ERROR: reserving fdt memory region failed (addr=0 size=0)
Loading Device Tree to 00000000f4a17000, end 00000000f4a98fff ... OK
Starting kernel ...
Orange Pi 3.0.6 Focal ttyS2
orangepi4-lts login: orangepi
Password:
Login incorrect
orangepi4-lts login: admin
Password:
Login incorrect
orangepi4-lts login:
Login timed out after 60 seconds.
Orange Pi 3.0.6 Focal ttyS2
orangepi4-lts login: orangepi
Password:
Login incorrect
orangepi4-lts login: orangepi
Password:
___ ____ ___ _ _ _ _____ ____
/ _ \| _ \_ _| | || | | | |_ _/ ___|
| | | | |_) | | | || |_ | | | | \___ \
| |_| | __/| | |__ _| | |___| |ocal with Linux 5.10.43
System load: 35% Up time: 4 min
Memory usage: 17% of 3.77G IP:
CPU temp: 78°C Usage of /: 19% of 14G
[ 0 security updates available, 2 updates total: apt upgrade ]
Last check: 2022-08-01 06:00
[ General system configuration (beta): orangepi-config ]
orangepi@orangepi4-lts:~$
so question appears, why none of releases did not work? why only official image? then the point of those images existing? or my OPi4LTS is broken?