After much trouble with my old build environment I cloned Hqnicolas build repo. 
Now I can confirm that it seems to work.

I made a quick speed comparison between the ssd and my external USB drive:
 

gt@yy3568:~$ sudo hdparm -tT --direct /dev/sda  

/dev/sda:
Timing O_DIRECT cached reads:   178 MB in  2.00 seconds =  88.89 MB/sec
Timing O_DIRECT disk reads: 322 MB in  3.01 seconds = 106.88 MB/sec



gt@yy3568:~$ sudo hdparm -tT --direct /dev/nvme0n1p1  

/dev/nvme0n1p1:
Timing O_DIRECT cached reads:   1160 MB in  2.00 seconds = 579.44 MB/sec
Timing O_DIRECT disk reads: 690 MB in  3.00 seconds = 229.89 MB/sec

Thank you very much to both @Arthur Gu and @Hqnicolas

Edited May 23May 23 by guenter

I bought this board because it has 2 lanes. 
So I changed the number of lanes in the dtb from 1 to 2. I need confirmation of an expert but my quick speed test with 2 lanes looks promising :

 

gt@yy3568:~$ sudo hdparm -tT --direct /dev/nvme0n1p1

/dev/nvme0n1p1:
 Timing O_DIRECT cached reads:   1062 MB in  2.00 seconds = 530.34 MB/sec
 Timing O_DIRECT disk reads: 928 MB in  3.00 seconds = 308.97 MB/sec

 

gt@yy3568:~$ sudo dmesg | grep lane
[    4.183004] phy phy-fe8c0000.phy.6: lane number 0, val 1
[    4.183679] phy phy-fe8c0000.phy.6: lane number 1, val 2

 

        pcie@fe280000 {
                compatible = "rockchip,rk3568-pcie";
                #address-cells = <0x03>;
                #size-cells = <0x02>;
                bus-range = <0x20 0x2f>;
                clocks = <0x0f 0x8f 0x0f 0x90 0x0f 0x91 0x0f 0x92 0x0f 0x93>;
                clock-names = "aclk_mst\0aclk_slv\0aclk_dbi\0pclk\0aux";
                device_type = "pci";
                interrupts = <0x00 0xa5 0x04 0x00 0xa4 0x04 0x00 0xa3 0x04 0x00 0xa2 0x04 0x00 0xa1 0x04>;
                interrupt-names = "sys\0pmc\0msg\0legacy\0err";
                #interrupt-cells = <0x01>;
                interrupt-map-mask = <0x00 0x00 0x00 0x07>;
                interrupt-map = <0x00 0x00 0x00 0x01 0xcb 0x00 0x00 0x00 0x00 0x02 0xcb 0x01 0x00 0x00 0x00 0x03 0xcb 0x02 0x00 0x00 0x00 0x04 0xcb 0x03>;
                linux,pci-domain = <0x02>;
                num-ib-windows = <0x06>;
                num-ob-windows = <0x02>;
                max-link-speed = <0x03>;
                msi-map = <0x2000 0x66 0x2000 0x1000>;
                num-lanes = <0x02>;
                phys = <0xca>;
                phy-names = "pcie-phy";
                power-domains = <0x11 0x0f>;
                reg = <0x03 0xc0800000 0x00 0x400000 0x00 0xfe280000 0x00 0x10000 0x00 0xf0000000 0x00 0x100000>;
                ranges = <0x1000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000 0x2000000 0x00 0xf0200000 0x00 0xf0200000 0x00 0x1e00000 0x3000000 0x03 0x80000000 0x03 0x80000000 0x00 0x40000000>;
                reg-names = "dbi\0apb\0config";
                resets = <0x0f 0xc1>;
                reset-names = "pipe";
                status = "okay";
                pinctrl-names = "default";
                pinctrl-0 = <0xcc>;
                reset-gpios = <0x58 0x1e 0x00>;
                vpcie3v3-supply = <0xcd>;
                phandle = <0x271>;

                legacy-interrupt-controller {
                        interrupt-controller;
                        #address-cells = <0x00>;
                        #interrupt-cells = <0x01>;
                        interrupt-parent = <0x01>;
                        interrupts = <0x00 0xa2 0x01>;
                        phandle = <0xcb>;
                };
        };

 

Edited May 23May 23 by guenter

Open source SPI-NOR to NVME bootload for yy3568:
https://github.com/hqnicolas/RK-SPI-NOR-Chainloader

how to use it:
https://wiki.radxa.com/Rock3/install/spi

 

the Rockchip loader bin for this type of BootROM:
https://github.com/hqnicolas/Rockchip-Library/blob/main/RK356x/rkbin/rk356x_spl_loader_ddr1056_v1.12.109_no_check_todly.bin

@guenter your pci-e fixes have ben included into this PR: https://github.com/armbian/build/pull/10365

 

Armbian-unofficial_26.08.0-trunk_Yy3568_noble_edge_7.1.7.tar.xz