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Thread Affinity & load balancing Rockchip with cortex A72 and A53

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My application creates 15 threads. Since A53 has 4 cores it is likely that more threads will be spawned by A53. Is there a way to manipulate scheduling and create more threads through cortex A72 so that it compensates the delay. Examples 6 threads on A72 and 9 threads on A53. This way it ensures the run time does not fluctuate and we achieve peak performance. 

Are you sure you want to bind each thread to a CPU? In my tests,  CPU scheduling is excellent, at least with kernel 4.4. Threads are assigned dynamically to slow or fast cores, depending on their CPU usage.

 

For example, let us imagine a thread is spawned with low CPU  requirements (let's say, 10%). It is spawned in a slow core (A53). But if it raises it demands, let's say to 70% CPU usage, then it is transferred to a fast core (A72), and then brought back to the slow ones when it decreases the CPU usage again.

 

According to your description, I think it could be more efficient if you leave the kernel handle it, unless you want certain threads to be always in the fast cores for a particular reason.

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Thanks, In my case some threads have more work and rest have slightly less. If i know beforehand which threads consume more cpu can i assign them forcibly to cortex A72. Also if the cpu requirement changes (increase or decrease) mid way does the kernel it still perform thread switch to different cortex? If yes does it happen only if the other cortex is idle? 

I'm pretty sure that you'll need to play with CPU affinity parameters, in your code. Now, this requires extensive testing and measurements to understand if you get any benefit or not, and I'm no expert in this domain.

You might get more help on ARM Community or StackOverflow.

 

Meanwhile, see http://man7.org/linux/man-pages/man2/sched_setaffinity.2.html and search for usages of this function.

 

Random example here : https://github.com/intel/u-nit/blob/b5added7b9b0298dc3286601298432e8c3ca37e1/src/main.c#L355

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